0000008a <__bad_interrupt>: 8a: 0c 94 00 00 jmp 0x0 <__heap_end> 0000008e : } //------------------------| FUNCTIONS |------------------------ unsigned int dobyte(char data) { 8e: 98 2f mov r25, r24 unsigned int reply; reply = 0; if ((data & 0x80)==0) { //process comamnd on second byte 90: 88 23 and r24, r24 92: d4 f0 brlt .+52 ; 0xc8 command = (data >> 3); 94: 85 95 asr r24 96: 85 95 asr r24 98: 85 95 asr r24 9a: 80 93 7a 00 sts 0x007A, r24 argument = (argument & 0x7F8) | (data & 0x07); // glue in its 0 through 2 9e: 20 91 64 00 lds r18, 0x0064 a2: 30 91 65 00 lds r19, 0x0065 a6: 28 7f andi r18, 0xF8 ; 248 a8: 37 70 andi r19, 0x07 ; 7 aa: 89 2f mov r24, r25 ac: 99 27 eor r25, r25 ae: 87 fd sbrc r24, 7 b0: 90 95 com r25 b2: 87 70 andi r24, 0x07 ; 7 b4: 90 70 andi r25, 0x00 ; 0 b6: 28 2b or r18, r24 b8: 39 2b or r19, r25 ba: 30 93 65 00 sts 0x0065, r19 be: 20 93 64 00 sts 0x0064, r18 c2: 20 e0 ldi r18, 0x00 ; 0 c4: 30 e0 ldi r19, 0x00 ; 0 c6: a5 c1 rjmp .+842 ; 0x412 } else { argument = (argument & 0x07) | ((data & 0x7F) << 3); //glue in bits 3 through 9 c8: 20 91 64 00 lds r18, 0x0064 cc: 30 91 65 00 lds r19, 0x0065 d0: 27 70 andi r18, 0x07 ; 7 d2: 30 70 andi r19, 0x00 ; 0 d4: 99 27 eor r25, r25 d6: 87 fd sbrc r24, 7 d8: 90 95 com r25 da: 8f 77 andi r24, 0x7F ; 127 dc: 90 70 andi r25, 0x00 ; 0 de: 88 0f add r24, r24 e0: 99 1f adc r25, r25 e2: 88 0f add r24, r24 e4: 99 1f adc r25, r25 e6: 88 0f add r24, r24 e8: 99 1f adc r25, r25 ea: 28 2b or r18, r24 ec: 39 2b or r19, r25 ee: 30 93 65 00 sts 0x0065, r19 f2: 20 93 64 00 sts 0x0064, r18 switch(command) { f6: 80 91 7a 00 lds r24, 0x007A fa: 84 30 cpi r24, 0x04 ; 4 fc: 09 f4 brne .+2 ; 0x100 fe: b7 c0 rjmp .+366 ; 0x26e 100: 85 30 cpi r24, 0x05 ; 5 102: 58 f4 brcc .+22 ; 0x11a 104: 81 30 cpi r24, 0x01 ; 1 106: e9 f0 breq .+58 ; 0x142 108: 81 30 cpi r24, 0x01 ; 1 10a: b0 f0 brcs .+44 ; 0x138 10c: 82 30 cpi r24, 0x02 ; 2 10e: 09 f4 brne .+2 ; 0x112 110: 4b c0 rjmp .+150 ; 0x1a8 112: 83 30 cpi r24, 0x03 ; 3 114: 09 f0 breq .+2 ; 0x118 116: 7b c1 rjmp .+758 ; 0x40e 118: 7b c0 rjmp .+246 ; 0x210 11a: 86 30 cpi r24, 0x06 ; 6 11c: 09 f4 brne .+2 ; 0x120 11e: e3 c0 rjmp .+454 ; 0x2e6 120: 86 30 cpi r24, 0x06 ; 6 122: 08 f4 brcc .+2 ; 0x126 124: c4 c0 rjmp .+392 ; 0x2ae 126: 87 30 cpi r24, 0x07 ; 7 128: 09 f4 brne .+2 ; 0x12c 12a: 01 c1 rjmp .+514 ; 0x32e 12c: 8f 30 cpi r24, 0x0F ; 15 12e: 09 f0 breq .+2 ; 0x132 130: 6e c1 rjmp .+732 ; 0x40e 132: 21 e0 ldi r18, 0x01 ; 1 134: 30 e0 ldi r19, 0x00 ; 0 136: 6d c1 rjmp .+730 ; 0x412 case 0: // Clear ping counter pingCtr = 0; 138: 10 92 8a 00 sts 0x008A, r1 13c: 20 e0 ldi r18, 0x00 ; 0 13e: 30 e0 ldi r19, 0x00 ; 0 140: 68 c1 rjmp .+720 ; 0x412 break; case 1: // pong if ping counter matches id and inc ping counter if ((pingCtr == ID0) | (pingCtr == ID1) | (pingCtr == ID2) | (pingCtr == ID3)) { 142: 40 91 8a 00 lds r20, 0x008A 146: 60 e0 ldi r22, 0x00 ; 0 148: 70 e0 ldi r23, 0x00 ; 0 14a: 42 30 cpi r20, 0x02 ; 2 14c: 10 f4 brcc .+4 ; 0x152 14e: 61 e0 ldi r22, 0x01 ; 1 150: 70 e0 ldi r23, 0x00 ; 0 152: 20 e0 ldi r18, 0x00 ; 0 154: 30 e0 ldi r19, 0x00 ; 0 156: 42 30 cpi r20, 0x02 ; 2 158: 11 f4 brne .+4 ; 0x15e 15a: 21 e0 ldi r18, 0x01 ; 1 15c: 30 e0 ldi r19, 0x00 ; 0 15e: 80 e0 ldi r24, 0x00 ; 0 160: 90 e0 ldi r25, 0x00 ; 0 162: 43 30 cpi r20, 0x03 ; 3 164: 11 f4 brne .+4 ; 0x16a 166: 81 e0 ldi r24, 0x01 ; 1 168: 90 e0 ldi r25, 0x00 ; 0 16a: 82 2b or r24, r18 16c: 93 2b or r25, r19 16e: 86 2b or r24, r22 170: 97 2b or r25, r23 172: 89 2b or r24, r25 174: 19 f4 brne .+6 ; 0x17c 176: 20 e0 ldi r18, 0x00 ; 0 178: 30 e0 ldi r19, 0x00 ; 0 17a: 11 c0 rjmp .+34 ; 0x19e reply = ((pingCtr << 5) & 0xFF00)|(pingCtr & 0x07)|0x8000; 17c: 84 2f mov r24, r20 17e: 99 27 eor r25, r25 180: 9c 01 movw r18, r24 182: 22 0f add r18, r18 184: 33 1f adc r19, r19 186: 22 95 swap r18 188: 32 95 swap r19 18a: 30 7f andi r19, 0xF0 ; 240 18c: 32 27 eor r19, r18 18e: 20 7f andi r18, 0xF0 ; 240 190: 32 27 eor r19, r18 192: 20 70 andi r18, 0x00 ; 0 194: 87 70 andi r24, 0x07 ; 7 196: 90 70 andi r25, 0x00 ; 0 198: 90 68 ori r25, 0x80 ; 128 19a: 28 2b or r18, r24 19c: 39 2b or r19, r25 } pingCtr++; 19e: 84 2f mov r24, r20 1a0: 8f 5f subi r24, 0xFF ; 255 1a2: 80 93 8a 00 sts 0x008A, r24 1a6: 35 c1 rjmp .+618 ; 0x412 break; case 2: // listen(id) if (argument == ID0) listen[0] = 1; 1a8: 21 15 cp r18, r1 1aa: 31 05 cpc r19, r1 1ac: 31 f4 brne .+12 ; 0x1ba 1ae: 81 e0 ldi r24, 0x01 ; 1 1b0: 80 93 86 00 sts 0x0086, r24 1b4: 20 e0 ldi r18, 0x00 ; 0 1b6: 30 e0 ldi r19, 0x00 ; 0 1b8: 2c c1 rjmp .+600 ; 0x412 else if (argument == ID1) listen[1] = 1; 1ba: 21 30 cpi r18, 0x01 ; 1 1bc: 31 05 cpc r19, r1 1be: 31 f4 brne .+12 ; 0x1cc 1c0: 81 e0 ldi r24, 0x01 ; 1 1c2: 80 93 87 00 sts 0x0087, r24 1c6: 20 e0 ldi r18, 0x00 ; 0 1c8: 30 e0 ldi r19, 0x00 ; 0 1ca: 23 c1 rjmp .+582 ; 0x412 else if (argument == ID2) listen[2] = 1; 1cc: 22 30 cpi r18, 0x02 ; 2 1ce: 31 05 cpc r19, r1 1d0: 31 f4 brne .+12 ; 0x1de 1d2: 81 e0 ldi r24, 0x01 ; 1 1d4: 80 93 88 00 sts 0x0088, r24 1d8: 20 e0 ldi r18, 0x00 ; 0 1da: 30 e0 ldi r19, 0x00 ; 0 1dc: 1a c1 rjmp .+564 ; 0x412 else if (argument == ID3) listen[3] = 1; 1de: 23 30 cpi r18, 0x03 ; 3 1e0: 31 05 cpc r19, r1 1e2: 31 f4 brne .+12 ; 0x1f0 1e4: 81 e0 ldi r24, 0x01 ; 1 1e6: 80 93 89 00 sts 0x0089, r24 1ea: 20 e0 ldi r18, 0x00 ; 0 1ec: 30 e0 ldi r19, 0x00 ; 0 1ee: 11 c1 rjmp .+546 ; 0x412 else if (argument == 256) { listen[0] = 1; listen[1] = 1; listen[2] = 1; listen[3] = 1; } 1f0: 20 50 subi r18, 0x00 ; 0 1f2: 31 40 sbci r19, 0x01 ; 1 1f4: 09 f0 breq .+2 ; 0x1f8 1f6: 0b c1 rjmp .+534 ; 0x40e 1f8: 81 e0 ldi r24, 0x01 ; 1 1fa: 80 93 86 00 sts 0x0086, r24 1fe: 80 93 87 00 sts 0x0087, r24 202: 80 93 88 00 sts 0x0088, r24 206: 80 93 89 00 sts 0x0089, r24 20a: 20 e0 ldi r18, 0x00 ; 0 20c: 30 e0 ldi r19, 0x00 ; 0 20e: 01 c1 rjmp .+514 ; 0x412 break; case 3: // ignore(id) if (argument == ID0) listen[0] = 0; 210: 21 15 cp r18, r1 212: 31 05 cpc r19, r1 214: 29 f4 brne .+10 ; 0x220 216: 10 92 86 00 sts 0x0086, r1 21a: 20 e0 ldi r18, 0x00 ; 0 21c: 30 e0 ldi r19, 0x00 ; 0 21e: f9 c0 rjmp .+498 ; 0x412 else if (argument == ID1) listen[1] = 0; 220: 21 30 cpi r18, 0x01 ; 1 222: 31 05 cpc r19, r1 224: 29 f4 brne .+10 ; 0x230 226: 10 92 87 00 sts 0x0087, r1 22a: 20 e0 ldi r18, 0x00 ; 0 22c: 30 e0 ldi r19, 0x00 ; 0 22e: f1 c0 rjmp .+482 ; 0x412 else if (argument == ID2) listen[2] = 0; 230: 22 30 cpi r18, 0x02 ; 2 232: 31 05 cpc r19, r1 234: 29 f4 brne .+10 ; 0x240 236: 10 92 88 00 sts 0x0088, r1 23a: 20 e0 ldi r18, 0x00 ; 0 23c: 30 e0 ldi r19, 0x00 ; 0 23e: e9 c0 rjmp .+466 ; 0x412 else if (argument == ID3) listen[3] = 0; 240: 23 30 cpi r18, 0x03 ; 3 242: 31 05 cpc r19, r1 244: 29 f4 brne .+10 ; 0x250 246: 10 92 89 00 sts 0x0089, r1 24a: 20 e0 ldi r18, 0x00 ; 0 24c: 30 e0 ldi r19, 0x00 ; 0 24e: e1 c0 rjmp .+450 ; 0x412 else if (argument == 256) { listen[0] = 0; listen[1] = 0; listen[2] = 0; listen[3] = 0; } 250: 20 50 subi r18, 0x00 ; 0 252: 31 40 sbci r19, 0x01 ; 1 254: 09 f0 breq .+2 ; 0x258 256: db c0 rjmp .+438 ; 0x40e 258: 10 92 86 00 sts 0x0086, r1 25c: 10 92 87 00 sts 0x0087, r1 260: 10 92 88 00 sts 0x0088, r1 264: 10 92 89 00 sts 0x0089, r1 268: 20 e0 ldi r18, 0x00 ; 0 26a: 30 e0 ldi r19, 0x00 ; 0 26c: d2 c0 rjmp .+420 ; 0x412 break; case 4: // servo on if (listen[0]) power[0] = 1; 26e: 80 91 86 00 lds r24, 0x0086 272: 88 23 and r24, r24 274: 19 f0 breq .+6 ; 0x27c 276: 81 e0 ldi r24, 0x01 ; 1 278: 80 93 66 00 sts 0x0066, r24 if (listen[1]) power[1] = 1; 27c: 80 91 87 00 lds r24, 0x0087 280: 88 23 and r24, r24 282: 19 f0 breq .+6 ; 0x28a 284: 81 e0 ldi r24, 0x01 ; 1 286: 80 93 67 00 sts 0x0067, r24 if (listen[2]) power[2] = 1; 28a: 80 91 88 00 lds r24, 0x0088 28e: 88 23 and r24, r24 290: 19 f0 breq .+6 ; 0x298 292: 81 e0 ldi r24, 0x01 ; 1 294: 80 93 68 00 sts 0x0068, r24 if (listen[3]) power[3] = 1; 298: 80 91 89 00 lds r24, 0x0089 29c: 88 23 and r24, r24 29e: 09 f4 brne .+2 ; 0x2a2 2a0: b6 c0 rjmp .+364 ; 0x40e 2a2: 81 e0 ldi r24, 0x01 ; 1 2a4: 80 93 69 00 sts 0x0069, r24 2a8: 20 e0 ldi r18, 0x00 ; 0 2aa: 30 e0 ldi r19, 0x00 ; 0 2ac: b2 c0 rjmp .+356 ; 0x412 break; case 5: // servo off if (listen[0]) power[0] = 0; 2ae: 80 91 86 00 lds r24, 0x0086 2b2: 88 23 and r24, r24 2b4: 11 f0 breq .+4 ; 0x2ba 2b6: 10 92 66 00 sts 0x0066, r1 if (listen[1]) power[1] = 0; 2ba: 80 91 87 00 lds r24, 0x0087 2be: 88 23 and r24, r24 2c0: 11 f0 breq .+4 ; 0x2c6 2c2: 10 92 67 00 sts 0x0067, r1 if (listen[2]) power[2] = 0; 2c6: 80 91 88 00 lds r24, 0x0088 2ca: 88 23 and r24, r24 2cc: 11 f0 breq .+4 ; 0x2d2 2ce: 10 92 68 00 sts 0x0068, r1 if (listen[3]) power[3] = 0; 2d2: 80 91 89 00 lds r24, 0x0089 2d6: 88 23 and r24, r24 2d8: 09 f4 brne .+2 ; 0x2dc 2da: 99 c0 rjmp .+306 ; 0x40e 2dc: 10 92 69 00 sts 0x0069, r1 2e0: 20 e0 ldi r18, 0x00 ; 0 2e2: 30 e0 ldi r19, 0x00 ; 0 2e4: 96 c0 rjmp .+300 ; 0x412 break; case 6: // set servo position (position) if (listen[0]) cmdpos[0] = argument; 2e6: 80 91 86 00 lds r24, 0x0086 2ea: 88 23 and r24, r24 2ec: 21 f0 breq .+8 ; 0x2f6 2ee: 30 93 7e 00 sts 0x007E, r19 2f2: 20 93 7d 00 sts 0x007D, r18 if (listen[1]) cmdpos[1] = argument; 2f6: 80 91 87 00 lds r24, 0x0087 2fa: 88 23 and r24, r24 2fc: 21 f0 breq .+8 ; 0x306 2fe: 30 93 80 00 sts 0x0080, r19 302: 20 93 7f 00 sts 0x007F, r18 if (listen[2]) cmdpos[2] = argument; 306: 80 91 88 00 lds r24, 0x0088 30a: 88 23 and r24, r24 30c: 21 f0 breq .+8 ; 0x316 30e: 30 93 82 00 sts 0x0082, r19 312: 20 93 81 00 sts 0x0081, r18 if (listen[3]) cmdpos[3] = argument; 316: 80 91 89 00 lds r24, 0x0089 31a: 88 23 and r24, r24 31c: 09 f4 brne .+2 ; 0x320 31e: 77 c0 rjmp .+238 ; 0x40e 320: 30 93 84 00 sts 0x0084, r19 324: 20 93 83 00 sts 0x0083, r18 328: 20 e0 ldi r18, 0x00 ; 0 32a: 30 e0 ldi r19, 0x00 ; 0 32c: 72 c0 rjmp .+228 ; 0x412 break; case 7: // get servo position if (listen[0]) reply = ((AdcValues[0] << 5) & 0xFF00)|(AdcValues[0] & 0x07)|0x8000|(1<<3); 32e: 80 91 86 00 lds r24, 0x0086 332: 88 23 and r24, r24 334: c1 f0 breq .+48 ; 0x366 336: 20 91 6a 00 lds r18, 0x006A 33a: 30 91 6b 00 lds r19, 0x006B 33e: 80 91 6a 00 lds r24, 0x006A 342: 90 91 6b 00 lds r25, 0x006B 346: 22 0f add r18, r18 348: 33 1f adc r19, r19 34a: 22 95 swap r18 34c: 32 95 swap r19 34e: 30 7f andi r19, 0xF0 ; 240 350: 32 27 eor r19, r18 352: 20 7f andi r18, 0xF0 ; 240 354: 32 27 eor r19, r18 356: 20 70 andi r18, 0x00 ; 0 358: 87 70 andi r24, 0x07 ; 7 35a: 90 70 andi r25, 0x00 ; 0 35c: 88 60 ori r24, 0x08 ; 8 35e: 90 68 ori r25, 0x80 ; 128 360: 28 2b or r18, r24 362: 39 2b or r19, r25 364: 56 c0 rjmp .+172 ; 0x412 else if (listen[1]) reply = ((AdcValues[2] << 5) & 0xFF00)|(AdcValues[2] & 0x07)|0x8000|(1<<3); 366: 80 91 87 00 lds r24, 0x0087 36a: 88 23 and r24, r24 36c: c1 f0 breq .+48 ; 0x39e 36e: 20 91 6e 00 lds r18, 0x006E 372: 30 91 6f 00 lds r19, 0x006F 376: 80 91 6e 00 lds r24, 0x006E 37a: 90 91 6f 00 lds r25, 0x006F 37e: 22 0f add r18, r18 380: 33 1f adc r19, r19 382: 22 95 swap r18 384: 32 95 swap r19 386: 30 7f andi r19, 0xF0 ; 240 388: 32 27 eor r19, r18 38a: 20 7f andi r18, 0xF0 ; 240 38c: 32 27 eor r19, r18 38e: 20 70 andi r18, 0x00 ; 0 390: 87 70 andi r24, 0x07 ; 7 392: 90 70 andi r25, 0x00 ; 0 394: 88 60 ori r24, 0x08 ; 8 396: 90 68 ori r25, 0x80 ; 128 398: 28 2b or r18, r24 39a: 39 2b or r19, r25 39c: 3a c0 rjmp .+116 ; 0x412 else if (listen[2]) reply = ((AdcValues[4] << 5) & 0xFF00)|(AdcValues[4] & 0x07)|0x8000|(1<<3); 39e: 80 91 88 00 lds r24, 0x0088 3a2: 88 23 and r24, r24 3a4: c1 f0 breq .+48 ; 0x3d6 3a6: 20 91 72 00 lds r18, 0x0072 3aa: 30 91 73 00 lds r19, 0x0073 3ae: 80 91 72 00 lds r24, 0x0072 3b2: 90 91 73 00 lds r25, 0x0073 3b6: 22 0f add r18, r18 3b8: 33 1f adc r19, r19 3ba: 22 95 swap r18 3bc: 32 95 swap r19 3be: 30 7f andi r19, 0xF0 ; 240 3c0: 32 27 eor r19, r18 3c2: 20 7f andi r18, 0xF0 ; 240 3c4: 32 27 eor r19, r18 3c6: 20 70 andi r18, 0x00 ; 0 3c8: 87 70 andi r24, 0x07 ; 7 3ca: 90 70 andi r25, 0x00 ; 0 3cc: 88 60 ori r24, 0x08 ; 8 3ce: 90 68 ori r25, 0x80 ; 128 3d0: 28 2b or r18, r24 3d2: 39 2b or r19, r25 3d4: 1e c0 rjmp .+60 ; 0x412 else if (listen[3]) reply = ((AdcValues[6] << 5) & 0xFF00)|(AdcValues[6] & 0x07)|0x8000|(1<<3); 3d6: 80 91 89 00 lds r24, 0x0089 3da: 88 23 and r24, r24 3dc: c1 f0 breq .+48 ; 0x40e 3de: 20 91 76 00 lds r18, 0x0076 3e2: 30 91 77 00 lds r19, 0x0077 3e6: 80 91 76 00 lds r24, 0x0076 3ea: 90 91 77 00 lds r25, 0x0077 3ee: 22 0f add r18, r18 3f0: 33 1f adc r19, r19 3f2: 22 95 swap r18 3f4: 32 95 swap r19 3f6: 30 7f andi r19, 0xF0 ; 240 3f8: 32 27 eor r19, r18 3fa: 20 7f andi r18, 0xF0 ; 240 3fc: 32 27 eor r19, r18 3fe: 20 70 andi r18, 0x00 ; 0 400: 87 70 andi r24, 0x07 ; 7 402: 90 70 andi r25, 0x00 ; 0 404: 88 60 ori r24, 0x08 ; 8 406: 90 68 ori r25, 0x80 ; 128 408: 28 2b or r18, r24 40a: 39 2b or r19, r25 40c: 02 c0 rjmp .+4 ; 0x412 40e: 20 e0 ldi r18, 0x00 ; 0 410: 30 e0 ldi r19, 0x00 ; 0 break; case 15: // return device model reply = 0x0001; break; } } return reply; } 412: c9 01 movw r24, r18 414: 08 95 ret 00000416 <__vector_11>: /********************************************************* !!!!!!!!! SEVERLY OPTIMIZED CODE !!!!!!!!! REFERNENCE ASSEMBLER OUTPUT WHEN MODIFYING THIS PWM FUNCTION gcc -O1 **********************************************************/ SIGNAL (SIG_OVERFLOW0) { 416: 1f 92 push r1 418: 0f 92 push r0 41a: 0f b6 in r0, 0x3f ; 63 41c: 0f 92 push r0 41e: 11 24 eor r1, r1 420: 8f 93 push r24 422: 9f 93 push r25 if (++pwmcount == 0){ 424: 80 91 7b 00 lds r24, 0x007B 428: 98 2f mov r25, r24 42a: 9f 5f subi r25, 0xFF ; 255 42c: 90 93 7b 00 sts 0x007B, r25 430: 99 23 and r25, r25 432: 01 f5 brne .+64 ; 0x474 <__vector_11+0x5e> p0 = pwm0; p1 = pwm1; p2 = pwm2; p3 = pwm3; 434: 80 91 85 00 lds r24, 0x0085 438: 80 93 60 00 sts 0x0060, r24 43c: 80 91 61 00 lds r24, 0x0061 440: 80 93 7c 00 sts 0x007C, r24 444: 80 91 62 00 lds r24, 0x0062 448: 80 93 63 00 sts 0x0063, r24 44c: 80 91 8b 00 lds r24, 0x008B 450: 80 93 8c 00 sts 0x008C, r24 if (power[0] != 0) SetBit(PWM0BIT, PWM0PORT); 454: 80 91 66 00 lds r24, 0x0066 458: 81 11 cpse r24, r1 45a: c0 9a sbi 0x18, 0 ; 24 if (power[1] != 0) SetBit(PWM1BIT, PWM1PORT); 45c: 80 91 67 00 lds r24, 0x0067 460: 81 11 cpse r24, r1 462: c1 9a sbi 0x18, 1 ; 24 if (power[2] != 0) SetBit(PWM2BIT, PWM2PORT); 464: 80 91 68 00 lds r24, 0x0068 468: 81 11 cpse r24, r1 46a: c2 9a sbi 0x18, 2 ; 24 if (power[3] != 0) SetBit(PWM3BIT, PWM3PORT); 46c: 80 91 69 00 lds r24, 0x0069 470: 81 11 cpse r24, r1 472: c3 9a sbi 0x18, 3 ; 24 }; if ((p0 ^ pwmcount) == 0) { ClearBit(PWM0BIT, PWM0PORT); } 474: 80 91 60 00 lds r24, 0x0060 478: 98 17 cp r25, r24 47a: 09 f4 brne .+2 ; 0x47e <__vector_11+0x68> 47c: c0 98 cbi 0x18, 0 ; 24 if ((p1 ^ pwmcount) == 0) { ClearBit(PWM1BIT, PWM1PORT); } 47e: 80 91 7c 00 lds r24, 0x007C 482: 98 17 cp r25, r24 484: 09 f4 brne .+2 ; 0x488 <__vector_11+0x72> 486: c1 98 cbi 0x18, 1 ; 24 if ((p2 ^ pwmcount) == 0) { ClearBit(PWM2BIT, PWM2PORT); } 488: 80 91 63 00 lds r24, 0x0063 48c: 98 17 cp r25, r24 48e: 09 f4 brne .+2 ; 0x492 <__vector_11+0x7c> 490: c2 98 cbi 0x18, 2 ; 24 if ((p3 ^ pwmcount) == 0) { ClearBit(PWM3BIT, PWM3PORT); } 492: 80 91 8c 00 lds r24, 0x008C 496: 98 17 cp r25, r24 498: 09 f4 brne .+2 ; 0x49c <__vector_11+0x86> 49a: c3 98 cbi 0x18, 3 ; 24 49c: 9f 91 pop r25 49e: 8f 91 pop r24 4a0: 0f 90 pop r0 4a2: 0f be out 0x3f, r0 ; 63 4a4: 0f 90 pop r0 4a6: 1f 90 pop r1 4a8: 18 95 reti 000004aa : } void timerInit(void) { // set prescaler to /1 TCCR0 = (0 << FOC0 | 0 << WGM00 |0 << COM01 |0 << COM00 |0 << WGM01 |0 << CS02 |0 << CS01 |1 << CS00); 4aa: 81 e0 ldi r24, 0x01 ; 1 4ac: 83 bf out 0x33, r24 ; 51 // set interrupt mask register TIMSK |= (1<: } void AnalogInit (void) { int i; // Activate ADC with Prescaler ADCSRA = 1 << ADEN | 4b6: 8c ec ldi r24, 0xCC ; 204 4b8: 86 b9 out 0x06, r24 ; 6 4ba: 80 e0 ldi r24, 0x00 ; 0 4bc: 90 e0 ldi r25, 0x00 ; 0 4be: 2a e6 ldi r18, 0x6A ; 106 4c0: 30 e0 ldi r19, 0x00 ; 0 1 << ADSC | /* start a converstion, irq will take from here */ 0 << ADATE | 0 << ADIF | 1 << ADIE | /* enable interrupt */ 1 << ADPS2 | 0 << ADPS1 | 0 << ADPS0 ; for (i = 0; i < 8; AdcValues[i++] = 0); 4c2: fc 01 movw r30, r24 4c4: ee 0f add r30, r30 4c6: ff 1f adc r31, r31 4c8: e2 0f add r30, r18 4ca: f3 1f adc r31, r19 4cc: 11 82 std Z+1, r1 ; 0x01 4ce: 10 82 st Z, r1 4d0: 01 96 adiw r24, 0x01 ; 1 4d2: 88 30 cpi r24, 0x08 ; 8 4d4: 91 05 cpc r25, r1 4d6: a9 f7 brne .-22 ; 0x4c2 4d8: 08 95 ret 000004da : } int Analog (int n) { return AdcValues[n & 7]; 4da: fc 01 movw r30, r24 4dc: e7 70 andi r30, 0x07 ; 7 4de: f0 70 andi r31, 0x00 ; 0 4e0: ee 0f add r30, r30 4e2: ff 1f adc r31, r31 4e4: e6 59 subi r30, 0x96 ; 150 4e6: ff 4f sbci r31, 0xFF ; 255 4e8: 80 81 ld r24, Z 4ea: 91 81 ldd r25, Z+1 ; 0x01 4ec: 08 95 ret 000004ee <__vector_16>: } SIGNAL(SIG_ADC) { 4ee: 1f 92 push r1 4f0: 0f 92 push r0 4f2: 0f b6 in r0, 0x3f ; 63 4f4: 0f 92 push r0 4f6: 11 24 eor r1, r1 4f8: 2f 93 push r18 4fa: 3f 93 push r19 4fc: 8f 93 push r24 4fe: 9f 93 push r25 500: ef 93 push r30 502: ff 93 push r31 int i; i = ADMUX & 7; // what channel we on? 504: 87 b1 in r24, 0x07 ; 7 506: 99 27 eor r25, r25 508: 87 70 andi r24, 0x07 ; 7 50a: 90 70 andi r25, 0x00 ; 0 AdcValues[i] = ADC; // save value 50c: 24 b1 in r18, 0x04 ; 4 50e: 35 b1 in r19, 0x05 ; 5 510: fc 01 movw r30, r24 512: ee 0f add r30, r30 514: ff 1f adc r31, r31 516: e6 59 subi r30, 0x96 ; 150 518: ff 4f sbci r31, 0xFF ; 255 51a: 31 83 std Z+1, r19 ; 0x01 51c: 20 83 st Z, r18 i++; // next value ADMUX = i & 7; // select channel 51e: 01 96 adiw r24, 0x01 ; 1 520: 87 70 andi r24, 0x07 ; 7 522: 87 b9 out 0x07, r24 ; 7 ADCSRA |= _BV(ADSC); // start next conversion 524: 36 9a sbi 0x06, 6 ; 6 526: ff 91 pop r31 528: ef 91 pop r30 52a: 9f 91 pop r25 52c: 8f 91 pop r24 52e: 3f 91 pop r19 530: 2f 91 pop r18 532: 0f 90 pop r0 534: 0f be out 0x3f, r0 ; 63 536: 0f 90 pop r0 538: 1f 90 pop r1 53a: 18 95 reti 0000053c

: 53c: cf e5 ldi r28, 0x5F ; 95 53e: d8 e0 ldi r29, 0x08 ; 8 540: de bf out 0x3e, r29 ; 62 542: cd bf out 0x3d, r28 ; 61 544: 1a ba out 0x1a, r1 ; 26 546: 8f ef ldi r24, 0xFF ; 255 548: 87 bb out 0x17, r24 ; 23 54a: 14 ba out 0x14, r1 ; 20 54c: 80 e4 ldi r24, 0x40 ; 64 54e: 81 bb out 0x11, r24 ; 17 550: 10 92 85 00 sts 0x0085, r1 554: 10 92 61 00 sts 0x0061, r1 558: 10 92 62 00 sts 0x0062, r1 55c: 10 92 8b 00 sts 0x008B, r1 560: 87 e6 ldi r24, 0x67 ; 103 562: 90 e0 ldi r25, 0x00 ; 0 564: 0e 94 40 03 call 0x680 568: 0e 94 5b 02 call 0x4b6 56c: 0e 94 55 02 call 0x4aa 570: 10 92 66 00 sts 0x0066, r1 574: 10 92 67 00 sts 0x0067, r1 578: 10 92 68 00 sts 0x0068, r1 57c: 10 92 69 00 sts 0x0069, r1 580: 78 94 sei 582: 5f 9b sbis 0x0b, 7 ; 11 584: 04 c0 rjmp .+8 ; 0x58e 586: 0e 94 49 03 call 0x692 58a: 0e 94 47 00 call 0x8e 58e: 20 91 6c 00 lds r18, 0x006C 592: 30 91 6d 00 lds r19, 0x006D 596: 80 91 7d 00 lds r24, 0x007D 59a: 90 91 7e 00 lds r25, 0x007E 59e: 82 1b sub r24, r18 5a0: 93 0b sbc r25, r19 5a2: 9c 01 movw r18, r24 5a4: 22 f4 brpl .+8 ; 0x5ae 5a6: 22 27 eor r18, r18 5a8: 33 27 eor r19, r19 5aa: 28 1b sub r18, r24 5ac: 39 0b sbc r19, r25 5ae: 2f 3f cpi r18, 0xFF ; 255 5b0: 31 05 cpc r19, r1 5b2: 19 f0 breq .+6 ; 0x5ba 5b4: 14 f0 brlt .+4 ; 0x5ba 5b6: 2f ef ldi r18, 0xFF ; 255 5b8: 30 e0 ldi r19, 0x00 ; 0 5ba: 20 93 85 00 sts 0x0085, r18 5be: 18 16 cp r1, r24 5c0: 19 06 cpc r1, r25 5c2: 14 f4 brge .+4 ; 0x5c8 5c4: c4 9a sbi 0x18, 4 ; 24 5c6: 01 c0 rjmp .+2 ; 0x5ca 5c8: c4 98 cbi 0x18, 4 ; 24 5ca: 20 91 70 00 lds r18, 0x0070 5ce: 30 91 71 00 lds r19, 0x0071 5d2: 80 91 7f 00 lds r24, 0x007F 5d6: 90 91 80 00 lds r25, 0x0080 5da: 82 1b sub r24, r18 5dc: 93 0b sbc r25, r19 5de: 9c 01 movw r18, r24 5e0: 22 f4 brpl .+8 ; 0x5ea 5e2: 22 27 eor r18, r18 5e4: 33 27 eor r19, r19 5e6: 28 1b sub r18, r24 5e8: 39 0b sbc r19, r25 5ea: 2f 3f cpi r18, 0xFF ; 255 5ec: 31 05 cpc r19, r1 5ee: 19 f0 breq .+6 ; 0x5f6 5f0: 14 f0 brlt .+4 ; 0x5f6 5f2: 2f ef ldi r18, 0xFF ; 255 5f4: 30 e0 ldi r19, 0x00 ; 0 5f6: 20 93 61 00 sts 0x0061, r18 5fa: 18 16 cp r1, r24 5fc: 19 06 cpc r1, r25 5fe: 14 f4 brge .+4 ; 0x604 600: c5 9a sbi 0x18, 5 ; 24 602: 01 c0 rjmp .+2 ; 0x606 604: c5 98 cbi 0x18, 5 ; 24 606: 20 91 74 00 lds r18, 0x0074 60a: 30 91 75 00 lds r19, 0x0075 60e: 80 91 81 00 lds r24, 0x0081 612: 90 91 82 00 lds r25, 0x0082 616: 82 1b sub r24, r18 618: 93 0b sbc r25, r19 61a: 9c 01 movw r18, r24 61c: 22 f4 brpl .+8 ; 0x626 61e: 22 27 eor r18, r18 620: 33 27 eor r19, r19 622: 28 1b sub r18, r24 624: 39 0b sbc r19, r25 626: 2f 3f cpi r18, 0xFF ; 255 628: 31 05 cpc r19, r1 62a: 19 f0 breq .+6 ; 0x632 62c: 14 f0 brlt .+4 ; 0x632 62e: 2f ef ldi r18, 0xFF ; 255 630: 30 e0 ldi r19, 0x00 ; 0 632: 20 93 62 00 sts 0x0062, r18 636: 18 16 cp r1, r24 638: 19 06 cpc r1, r25 63a: 14 f4 brge .+4 ; 0x640 63c: c6 9a sbi 0x18, 6 ; 24 63e: 01 c0 rjmp .+2 ; 0x642 640: c6 98 cbi 0x18, 6 ; 24 642: 20 91 78 00 lds r18, 0x0078 646: 30 91 79 00 lds r19, 0x0079 64a: 80 91 83 00 lds r24, 0x0083 64e: 90 91 84 00 lds r25, 0x0084 652: 82 1b sub r24, r18 654: 93 0b sbc r25, r19 656: 9c 01 movw r18, r24 658: 22 f4 brpl .+8 ; 0x662 65a: 22 27 eor r18, r18 65c: 33 27 eor r19, r19 65e: 28 1b sub r18, r24 660: 39 0b sbc r19, r25 662: 2f 3f cpi r18, 0xFF ; 255 664: 31 05 cpc r19, r1 666: 19 f0 breq .+6 ; 0x66e 668: 14 f0 brlt .+4 ; 0x66e 66a: 2f ef ldi r18, 0xFF ; 255 66c: 30 e0 ldi r19, 0x00 ; 0 66e: 20 93 8b 00 sts 0x008B, r18 672: 18 16 cp r1, r24 674: 19 06 cpc r1, r25 676: 14 f4 brge .+4 ; 0x67c 678: c7 9a sbi 0x18, 7 ; 24 67a: 83 cf rjmp .-250 ; 0x582 67c: c7 98 cbi 0x18, 7 ; 24 67e: 81 cf rjmp .-254 ; 0x582 00000680 : 680: 29 2f mov r18, r25 682: 33 27 eor r19, r19 684: 20 bd out 0x20, r18 ; 32 686: 89 b9 out 0x09, r24 ; 9 688: 88 e1 ldi r24, 0x18 ; 24 68a: 8a b9 out 0x0a, r24 ; 10 68c: 8e e8 ldi r24, 0x8E ; 142 68e: 80 bd out 0x20, r24 ; 32 690: 08 95 ret 00000692 : 692: 5f 9b sbis 0x0b, 7 ; 11 694: fe cf rjmp .-4 ; 0x692 696: 8c b1 in r24, 0x0c ; 12 698: 99 27 eor r25, r25 69a: 08 95 ret 0000069c : 69c: 5d 9b sbis 0x0b, 5 ; 11 69e: fe cf rjmp .-4 ; 0x69c 6a0: 8c b9 out 0x0c, r24 ; 12 6a2: 08 95 ret 000006a4 : 6a4: 1f 93 push r17 6a6: 28 2f mov r18, r24 6a8: 98 2f mov r25, r24 6aa: 92 95 swap r25 6ac: 9f 70 andi r25, 0x0F ; 15 6ae: 89 2f mov r24, r25 6b0: 80 5d subi r24, 0xD0 ; 208 6b2: 8a 33 cpi r24, 0x3A ; 58 6b4: 08 f0 brcs .+2 ; 0x6b8 6b6: 89 5f subi r24, 0xF9 ; 249 6b8: 92 2f mov r25, r18 6ba: 9f 70 andi r25, 0x0F ; 15 6bc: 19 2f mov r17, r25 6be: 10 5d subi r17, 0xD0 ; 208 6c0: 1a 33 cpi r17, 0x3A ; 58 6c2: 08 f0 brcs .+2 ; 0x6c6 6c4: 19 5f subi r17, 0xF9 ; 249 6c6: 0e 94 4e 03 call 0x69c 6ca: 81 2f mov r24, r17 6cc: 0e 94 4e 03 call 0x69c 6d0: 1f 91 pop r17 6d2: 08 95 ret 000006d4 : 6d4: cf 93 push r28 6d6: df 93 push r29 6d8: ec 01 movw r28, r24 6da: 88 81 ld r24, Y 6dc: 88 23 and r24, r24 6de: 31 f0 breq .+12 ; 0x6ec 6e0: 0e 94 4e 03 call 0x69c 6e4: 21 96 adiw r28, 0x01 ; 1 6e6: 88 81 ld r24, Y 6e8: 88 23 and r24, r24 6ea: d1 f7 brne .-12 ; 0x6e0 6ec: df 91 pop r29 6ee: cf 91 pop r28 6f0: 08 95 ret