main.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn 0 .text 00000242 00000000 00000000 00000094 2**0 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .data 00000010 00800060 00000242 000002d6 2**0 CONTENTS, ALLOC, LOAD, DATA 2 .bss 00000005 00800070 00800070 000002e6 2**0 ALLOC 3 .noinit 00000000 00800075 00800075 000002e6 2**0 CONTENTS 4 .eeprom 00000000 00810000 00810000 000002e6 2**0 CONTENTS 5 .stab 00000918 00000000 00000000 000002e8 2**2 CONTENTS, READONLY, DEBUGGING 6 .stabstr 00000954 00000000 00000000 00000c00 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 00000000 <__vectors>: 0: 0c 94 2a 00 jmp 0x54 4: 0c 94 72 00 jmp 0xe4 8: 0c 94 96 00 jmp 0x12c c: 0c 94 45 00 jmp 0x8a 10: 0c 94 45 00 jmp 0x8a 14: 0c 94 45 00 jmp 0x8a 18: 0c 94 45 00 jmp 0x8a 1c: 0c 94 45 00 jmp 0x8a 20: 0c 94 45 00 jmp 0x8a 24: 0c 94 45 00 jmp 0x8a 28: 0c 94 45 00 jmp 0x8a 2c: 0c 94 45 00 jmp 0x8a 30: 0c 94 45 00 jmp 0x8a 34: 0c 94 45 00 jmp 0x8a 38: 0c 94 45 00 jmp 0x8a 3c: 0c 94 45 00 jmp 0x8a 40: 0c 94 45 00 jmp 0x8a 44: 0c 94 45 00 jmp 0x8a 48: 0c 94 45 00 jmp 0x8a 4c: 0c 94 45 00 jmp 0x8a 50: 0c 94 45 00 jmp 0x8a 00000054 <__ctors_end>: 54: 11 24 eor r1, r1 56: 1f be out 0x3f, r1 ; 63 58: cf e5 ldi r28, 0x5F ; 95 5a: d8 e0 ldi r29, 0x08 ; 8 5c: de bf out 0x3e, r29 ; 62 5e: cd bf out 0x3d, r28 ; 61 00000060 <__do_copy_data>: 60: 10 e0 ldi r17, 0x00 ; 0 62: a0 e6 ldi r26, 0x60 ; 96 64: b0 e0 ldi r27, 0x00 ; 0 66: e2 e4 ldi r30, 0x42 ; 66 68: f2 e0 ldi r31, 0x02 ; 2 6a: 02 c0 rjmp .+4 ; 0x70 0000006c <.do_copy_data_loop>: 6c: 05 90 lpm r0, Z+ 6e: 0d 92 st X+, r0 00000070 <.do_copy_data_start>: 70: a0 37 cpi r26, 0x70 ; 112 72: b1 07 cpc r27, r17 74: d9 f7 brne .-10 ; 0x6c 00000076 <__do_clear_bss>: 76: 10 e0 ldi r17, 0x00 ; 0 78: a0 e7 ldi r26, 0x70 ; 112 7a: b0 e0 ldi r27, 0x00 ; 0 7c: 01 c0 rjmp .+2 ; 0x80 0000007e <.do_clear_bss_loop>: 7e: 1d 92 st X+, r1 00000080 <.do_clear_bss_start>: 80: a5 37 cpi r26, 0x75 ; 117 82: b1 07 cpc r27, r17 84: e1 f7 brne .-8 ; 0x7e 86: 0c 94 eb 00 jmp 0x1d6 0000008a <__bad_interrupt>: 8a: 0c 94 00 00 jmp 0x0 0000008e : } void pwm_init() { // clear pwm levels OCR0 = 0; 8e: 1c be out 0x3c, r1 ; 60 OCR2 = 0; 90: 13 bc out 0x23, r1 ; 35 // set up WGM, clock, and mode for timer 0 TCCR0 = 0 << FOC0 | 92: 8d e6 ldi r24, 0x6D ; 109 94: 83 bf out 0x33, r24 ; 51 1 << WGM00 | /* fast pwm */ 1 << COM01 | /* inverted */ 0 << COM00 | /* this bit 1 for inverted, 0 for normal */ 1 << WGM01 | /* fast pwm */ 1 << CS02 | /* prescale by 1024 */ 0 << CS01 | 1 << CS00 ; // set up WGM, clock, and mode for timer 2 TCCR2 = 0 << FOC2 | 96: 85 bd out 0x25, r24 ; 37 98: 08 95 ret 0000009a : 1 << WGM20 | 1 << COM21 | 0 << COM20 | /* this bit 1 for inverted, 0 for normal */ 1 << WGM21 | 1 << CS22 | 0 << CS21 | 1 << CS20 ; } void setupEncoder() { // clear position position = 0; 9a: 10 92 74 00 sts 0x0074, r1 9e: 10 92 73 00 sts 0x0073, r1 // we need to set up int0 and int1 to // trigger interrupts on both edges MCUCR = (1<: } void updatePos() { /* get the bits PIND = XXXXiiXX clear space & 0x0C = 0000ii00 or in old status | oldstate = XX00iijj clean up & 0x0F = 0000iijj */ oldstate = oldstate | (PIND & 0x0C); // Update Oldstate ac: 40 b3 in r20, 0x10 ; 16 ae: 4c 70 andi r20, 0x0C ; 12 b0: 80 91 72 00 lds r24, 0x0072 b4: 48 2b or r20, r24 position += offsets[oldstate]; // Update Position b6: e0 e6 ldi r30, 0x60 ; 96 b8: f0 e0 ldi r31, 0x00 ; 0 ba: e4 0f add r30, r20 bc: f1 1d adc r31, r1 be: 80 81 ld r24, Z c0: 99 27 eor r25, r25 c2: 87 fd sbrc r24, 7 c4: 90 95 com r25 c6: 20 91 73 00 lds r18, 0x0073 ca: 30 91 74 00 lds r19, 0x0074 ce: 82 0f add r24, r18 d0: 93 1f adc r25, r19 d2: 90 93 74 00 sts 0x0074, r25 d6: 80 93 73 00 sts 0x0073, r24 oldstate = oldstate >> 2; da: 46 95 lsr r20 dc: 46 95 lsr r20 de: 40 93 72 00 sts 0x0072, r20 e2: 08 95 ret 000000e4 <__vector_1>: e4: 1f 92 push r1 e6: 0f 92 push r0 e8: 0f b6 in r0, 0x3f ; 63 ea: 0f 92 push r0 ec: 11 24 eor r1, r1 ee: 2f 93 push r18 f0: 3f 93 push r19 f2: 4f 93 push r20 f4: 5f 93 push r21 f6: 6f 93 push r22 f8: 7f 93 push r23 fa: 8f 93 push r24 fc: 9f 93 push r25 fe: af 93 push r26 100: bf 93 push r27 102: ef 93 push r30 104: ff 93 push r31 106: 0e 94 56 00 call 0xac 10a: ff 91 pop r31 10c: ef 91 pop r30 10e: bf 91 pop r27 110: af 91 pop r26 112: 9f 91 pop r25 114: 8f 91 pop r24 116: 7f 91 pop r23 118: 6f 91 pop r22 11a: 5f 91 pop r21 11c: 4f 91 pop r20 11e: 3f 91 pop r19 120: 2f 91 pop r18 122: 0f 90 pop r0 124: 0f be out 0x3f, r0 ; 63 126: 0f 90 pop r0 128: 1f 90 pop r1 12a: 18 95 reti 0000012c <__vector_2>: 12c: 1f 92 push r1 12e: 0f 92 push r0 130: 0f b6 in r0, 0x3f ; 63 132: 0f 92 push r0 134: 11 24 eor r1, r1 136: 2f 93 push r18 138: 3f 93 push r19 13a: 4f 93 push r20 13c: 5f 93 push r21 13e: 6f 93 push r22 140: 7f 93 push r23 142: 8f 93 push r24 144: 9f 93 push r25 146: af 93 push r26 148: bf 93 push r27 14a: ef 93 push r30 14c: ff 93 push r31 14e: 0e 94 56 00 call 0xac 152: ff 91 pop r31 154: ef 91 pop r30 156: bf 91 pop r27 158: af 91 pop r26 15a: 9f 91 pop r25 15c: 8f 91 pop r24 15e: 7f 91 pop r23 160: 6f 91 pop r22 162: 5f 91 pop r21 164: 4f 91 pop r20 166: 3f 91 pop r19 168: 2f 91 pop r18 16a: 0f 90 pop r0 16c: 0f be out 0x3f, r0 ; 63 16e: 0f 90 pop r0 170: 1f 90 pop r1 172: 18 95 reti 00000174 : 174: 88 23 and r24, r24 176: 11 f4 brne .+4 ; 0x17c 178: 6c bf out 0x3c, r22 ; 60 17a: 08 95 ret 17c: 81 30 cpi r24, 0x01 ; 1 17e: 09 f0 breq .+2 ; 0x182 180: 08 95 ret 182: 63 bd out 0x23, r22 ; 35 184: 08 95 ret 186: 08 95 ret 00000188 : 188: 88 23 and r24, r24 18a: 11 f4 brne .+4 ; 0x190 18c: c0 9a sbi 0x18, 0 ; 24 18e: 08 95 ret 190: c0 98 cbi 0x18, 0 ; 24 192: 08 95 ret 194: 08 95 ret 00000196 : 196: cf 93 push r28 198: df 93 push r29 19a: ec 01 movw r28, r24 19c: 18 16 cp r1, r24 19e: 19 06 cpc r1, r25 1a0: 54 f4 brge .+20 ; 0x1b6 1a2: 60 e0 ldi r22, 0x00 ; 0 1a4: 86 2f mov r24, r22 1a6: 0e 94 ba 00 call 0x174 1aa: 81 e0 ldi r24, 0x01 ; 1 1ac: 0e 94 c4 00 call 0x188 1b0: 6c 2f mov r22, r28 1b2: 81 e0 ldi r24, 0x01 ; 1 1b4: 0b c0 rjmp .+22 ; 0x1cc 1b6: 60 e0 ldi r22, 0x00 ; 0 1b8: 81 e0 ldi r24, 0x01 ; 1 1ba: 0e 94 ba 00 call 0x174 1be: 80 e0 ldi r24, 0x00 ; 0 1c0: 0e 94 c4 00 call 0x188 1c4: 8c 2f mov r24, r28 1c6: 81 95 neg r24 1c8: 68 2f mov r22, r24 1ca: 80 e0 ldi r24, 0x00 ; 0 1cc: 0e 94 ba 00 call 0x174 1d0: df 91 pop r29 1d2: cf 91 pop r28 1d4: 08 95 ret 000001d6

: 1d6: cf e5 ldi r28, 0x5F ; 95 1d8: d8 e0 ldi r29, 0x08 ; 8 1da: de bf out 0x3e, r29 ; 62 1dc: cd bf out 0x3d, r28 ; 61 1de: 1a ba out 0x1a, r1 ; 26 1e0: 89 e0 ldi r24, 0x09 ; 9 1e2: 87 bb out 0x17, r24 ; 23 1e4: 14 ba out 0x14, r1 ; 20 1e6: 80 e8 ldi r24, 0x80 ; 128 1e8: 81 bb out 0x11, r24 ; 17 1ea: 0e 94 47 00 call 0x8e 1ee: 0e 94 4d 00 call 0x9a 1f2: 78 94 sei 1f4: 80 91 73 00 lds r24, 0x0073 1f8: 90 91 74 00 lds r25, 0x0074 1fc: 20 91 70 00 lds r18, 0x0070 200: 30 91 71 00 lds r19, 0x0071 204: 82 1b sub r24, r18 206: 93 0b sbc r25, r19 208: aa 27 eor r26, r26 20a: 97 fd sbrc r25, 7 20c: a0 95 com r26 20e: ba 2f mov r27, r26 210: 8f 3f cpi r24, 0xFF ; 255 212: 91 05 cpc r25, r1 214: a1 05 cpc r26, r1 216: b1 05 cpc r27, r1 218: 29 f0 breq .+10 ; 0x224 21a: 24 f0 brlt .+8 ; 0x224 21c: 8f ef ldi r24, 0xFF ; 255 21e: 90 e0 ldi r25, 0x00 ; 0 220: a0 e0 ldi r26, 0x00 ; 0 222: b0 e0 ldi r27, 0x00 ; 0 224: 81 30 cpi r24, 0x01 ; 1 226: 2f ef ldi r18, 0xFF ; 255 228: 92 07 cpc r25, r18 22a: 2f ef ldi r18, 0xFF ; 255 22c: a2 07 cpc r26, r18 22e: 2f ef ldi r18, 0xFF ; 255 230: b2 07 cpc r27, r18 232: 24 f4 brge .+8 ; 0x23c 234: 81 e0 ldi r24, 0x01 ; 1 236: 9f ef ldi r25, 0xFF ; 255 238: af ef ldi r26, 0xFF ; 255 23a: bf ef ldi r27, 0xFF ; 255 23c: 0e 94 cb 00 call 0x196 240: d9 cf rjmp .-78 ; 0x1f4