main.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn 0 .text 00000380 00000000 00000000 00000094 2**0 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .data 00000000 00800060 00000380 00000414 2**0 CONTENTS, ALLOC, LOAD, DATA 2 .bss 00000000 00800060 00000380 00000414 2**0 ALLOC 3 .noinit 00000000 00800060 00800060 00000414 2**0 CONTENTS 4 .eeprom 00000000 00810000 00810000 00000414 2**0 CONTENTS 5 .stab 00001650 00000000 00000000 00000414 2**2 CONTENTS, READONLY, DEBUGGING 6 .stabstr 00000c0f 00000000 00000000 00001a64 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 00000000 <__vectors>: 0: 0c 94 2a 00 jmp 0x54 4: 0c 94 45 00 jmp 0x8a 8: 0c 94 45 00 jmp 0x8a c: 0c 94 45 00 jmp 0x8a 10: 0c 94 45 00 jmp 0x8a 14: 0c 94 45 00 jmp 0x8a 18: 0c 94 45 00 jmp 0x8a 1c: 0c 94 45 00 jmp 0x8a 20: 0c 94 45 00 jmp 0x8a 24: 0c 94 45 00 jmp 0x8a 28: 0c 94 45 00 jmp 0x8a 2c: 0c 94 45 00 jmp 0x8a 30: 0c 94 45 00 jmp 0x8a 34: 0c 94 45 00 jmp 0x8a 38: 0c 94 45 00 jmp 0x8a 3c: 0c 94 45 00 jmp 0x8a 40: 0c 94 45 00 jmp 0x8a 44: 0c 94 45 00 jmp 0x8a 48: 0c 94 45 00 jmp 0x8a 4c: 0c 94 45 00 jmp 0x8a 50: 0c 94 45 00 jmp 0x8a 00000054 <__ctors_end>: 54: 11 24 eor r1, r1 56: 1f be out 0x3f, r1 ; 63 58: cf e5 ldi r28, 0x5F ; 95 5a: d8 e0 ldi r29, 0x08 ; 8 5c: de bf out 0x3e, r29 ; 62 5e: cd bf out 0x3d, r28 ; 61 00000060 <__do_copy_data>: 60: 10 e0 ldi r17, 0x00 ; 0 62: a0 e6 ldi r26, 0x60 ; 96 64: b0 e0 ldi r27, 0x00 ; 0 66: e0 e8 ldi r30, 0x80 ; 128 68: f3 e0 ldi r31, 0x03 ; 3 6a: 02 c0 rjmp .+4 ; 0x70 0000006c <.do_copy_data_loop>: 6c: 05 90 lpm r0, Z+ 6e: 0d 92 st X+, r0 00000070 <.do_copy_data_start>: 70: a0 36 cpi r26, 0x60 ; 96 72: b1 07 cpc r27, r17 74: d9 f7 brne .-10 ; 0x6c 00000076 <__do_clear_bss>: 76: 10 e0 ldi r17, 0x00 ; 0 78: a0 e6 ldi r26, 0x60 ; 96 7a: b0 e0 ldi r27, 0x00 ; 0 7c: 01 c0 rjmp .+2 ; 0x80 0000007e <.do_clear_bss_loop>: 7e: 1d 92 st X+, r1 00000080 <.do_clear_bss_start>: 80: a0 36 cpi r26, 0x60 ; 96 82: b1 07 cpc r27, r17 84: e1 f7 brne .-8 ; 0x7e 86: 0c 94 8d 00 jmp 0x11a 0000008a <__bad_interrupt>: 8a: 0c 94 00 00 jmp 0x0 0000008e : } void adc_init() { // Activate ADC with Prescaler ADCSRA = 1 << ADEN | 8e: 87 e8 ldi r24, 0x87 ; 135 90: 86 b9 out 0x06, r24 ; 6 92: 08 95 ret 00000094 : 0 << ADSC | 0 << ADATE | 0 << ADIF | 0 << ADIE | 1 << ADPS2 | /* divide by 128 for 16Mhz */ 1 << ADPS1 | 1 << ADPS0 ; } void pwm_init() { // clear pwm levels OCR0 = 0; 94: 1c be out 0x3c, r1 ; 60 OCR2 = 0; 96: 13 bc out 0x23, r1 ; 35 // set up WGM, clock, and mode for timer 0 TCCR0 = 0 << FOC0 | 98: 8d e7 ldi r24, 0x7D ; 125 9a: 83 bf out 0x33, r24 ; 51 1 << WGM00 | /* fast pwm */ 1 << COM01 | /* inverted */ 1 << COM00 | /* this bit 1 for inverted, 0 for normal */ 1 << WGM01 | /* fast pwm */ 1 << CS02 | /* prescale by ??? */ 0 << CS01 | 1 << CS00 ; // set up WGM, clock, and mode for timer 2 TCCR2 = 0 << FOC2 | 9c: 85 bd out 0x25, r24 ; 37 9e: 08 95 ret 000000a0 : 1 << WGM20 | 1 << COM21 | 1 << COM20 | /* this bit 1 for inverted, 0 for normal */ 1 << WGM21 | 1 << CS22 | 0 << CS21 | 1 << CS20 ; } int Analog ( uint8_t n ) { // Select pin ADC0 using MUX ADMUX = n & 7; a0: 87 70 andi r24, 0x07 ; 7 a2: 87 b9 out 0x07, r24 ; 7 //Start conversion ADCSRA |= _BV(ADSC); a4: 36 9a sbi 0x06, 6 ; 6 // wait until converstion completed while (ADCSRA & _BV(ADSC) ) {} a6: 36 99 sbic 0x06, 6 ; 6 a8: fe cf rjmp .-4 ; 0xa6 // get converted value return ADC; aa: 84 b1 in r24, 0x04 ; 4 ac: 95 b1 in r25, 0x05 ; 5 ae: 08 95 ret 000000b0 : b0: 88 23 and r24, r24 b2: 11 f4 brne .+4 ; 0xb8 b4: 6c bf out 0x3c, r22 ; 60 b6: 08 95 ret b8: 81 30 cpi r24, 0x01 ; 1 ba: 09 f0 breq .+2 ; 0xbe bc: 08 95 ret be: 63 bd out 0x23, r22 ; 35 c0: 08 95 ret c2: 08 95 ret 000000c4 : c4: 88 23 and r24, r24 c6: 21 f4 brne .+8 ; 0xd0 c8: 88 b3 in r24, 0x18 ; 24 ca: 83 60 ori r24, 0x03 ; 3 cc: 88 bb out 0x18, r24 ; 24 ce: 08 95 ret d0: 88 b3 in r24, 0x18 ; 24 d2: 8c 7f andi r24, 0xFC ; 252 d4: 88 bb out 0x18, r24 ; 24 d6: 08 95 ret d8: 08 95 ret 000000da : da: cf 93 push r28 dc: df 93 push r29 de: ec 01 movw r28, r24 e0: 18 16 cp r1, r24 e2: 19 06 cpc r1, r25 e4: 54 f4 brge .+20 ; 0xfa e6: 60 e0 ldi r22, 0x00 ; 0 e8: 86 2f mov r24, r22 ea: 0e 94 58 00 call 0xb0 ee: 81 e0 ldi r24, 0x01 ; 1 f0: 0e 94 62 00 call 0xc4 f4: 6c 2f mov r22, r28 f6: 81 e0 ldi r24, 0x01 ; 1 f8: 0b c0 rjmp .+22 ; 0x110 fa: 60 e0 ldi r22, 0x00 ; 0 fc: 81 e0 ldi r24, 0x01 ; 1 fe: 0e 94 58 00 call 0xb0 102: 80 e0 ldi r24, 0x00 ; 0 104: 0e 94 62 00 call 0xc4 108: 8c 2f mov r24, r28 10a: 81 95 neg r24 10c: 68 2f mov r22, r24 10e: 80 e0 ldi r24, 0x00 ; 0 110: 0e 94 58 00 call 0xb0 114: df 91 pop r29 116: cf 91 pop r28 118: 08 95 ret 0000011a
: 11a: cf e5 ldi r28, 0x5F ; 95 11c: d8 e0 ldi r29, 0x08 ; 8 11e: de bf out 0x3e, r29 ; 62 120: cd bf out 0x3d, r28 ; 61 122: 1a ba out 0x1a, r1 ; 26 124: 8f ef ldi r24, 0xFF ; 255 126: 87 bb out 0x17, r24 ; 23 128: 14 ba out 0x14, r1 ; 20 12a: 80 e8 ldi r24, 0x80 ; 128 12c: 81 bb out 0x11, r24 ; 17 12e: 0e 94 47 00 call 0x8e 132: 0e 94 4a 00 call 0x94 136: 80 e0 ldi r24, 0x00 ; 0 138: 0e 94 50 00 call 0xa0 13c: aa 27 eor r26, r26 13e: 97 fd sbrc r25, 7 140: a0 95 com r26 142: ba 2f mov r27, r26 144: bc 01 movw r22, r24 146: cd 01 movw r24, r26 148: 0e 94 25 01 call 0x24a 14c: dc 01 movw r26, r24 14e: cb 01 movw r24, r22 150: 20 e0 ldi r18, 0x00 ; 0 152: 30 e0 ldi r19, 0x00 ; 0 154: 40 e0 ldi r20, 0x00 ; 0 156: 5f e3 ldi r21, 0x3F ; 63 158: bc 01 movw r22, r24 15a: cd 01 movw r24, r26 15c: 0e 94 6f 01 call 0x2de 160: dc 01 movw r26, r24 162: cb 01 movw r24, r22 164: 20 e0 ldi r18, 0x00 ; 0 166: 30 e0 ldi r19, 0x00 ; 0 168: 40 e8 ldi r20, 0x80 ; 128 16a: 53 e4 ldi r21, 0x43 ; 67 16c: bc 01 movw r22, r24 16e: cd 01 movw r24, r26 170: 0e 94 c5 00 call 0x18a 174: dc 01 movw r26, r24 176: cb 01 movw r24, r22 178: bc 01 movw r22, r24 17a: cd 01 movw r24, r26 17c: 0e 94 08 01 call 0x210 180: dc 01 movw r26, r24 182: cb 01 movw r24, r22 184: 0e 94 6d 00 call 0xda 188: d6 cf rjmp .-84 ; 0x136 0000018a <__subsf3>: 18a: 50 58 subi r21, 0x80 ; 128 0000018c <__addsf3>: 18c: 19 2e mov r1, r25 18e: 84 d0 rcall .+264 ; 0x298 190: 01 d0 rcall .+2 ; 0x194 192: 6a c0 rjmp .+212 ; 0x268 00000194 <__addsf3x>: 194: ba 17 cp r27, r26 196: 62 07 cpc r22, r18 198: 73 07 cpc r23, r19 19a: 84 07 cpc r24, r20 19c: 95 07 cpc r25, r21 19e: b1 f1 breq .+108 ; 0x20c 1a0: 88 f4 brcc .+34 ; 0x1c4 1a2: 0e f4 brtc .+2 ; 0x1a6 1a4: 10 94 com r1 000001a6 <___addsf3x_01>: 1a6: 0b 2e mov r0, r27 1a8: ba 2f mov r27, r26 1aa: a0 2d mov r26, r0 1ac: 06 2e mov r0, r22 1ae: 62 2f mov r22, r18 1b0: 20 2d mov r18, r0 1b2: 07 2e mov r0, r23 1b4: 73 2f mov r23, r19 1b6: 30 2d mov r19, r0 1b8: 08 2e mov r0, r24 1ba: 84 2f mov r24, r20 1bc: 40 2d mov r20, r0 1be: 09 2e mov r0, r25 1c0: 95 2f mov r25, r21 1c2: 50 2d mov r21, r0 000001c4 <___addsf3x_100>: 1c4: ff 27 eor r31, r31 1c6: 55 23 and r21, r21 1c8: b9 f0 breq .+46 ; 0x1f8 1ca: 59 1b sub r21, r25 1cc: 49 f0 breq .+18 ; 0x1e0 1ce: 57 3e cpi r21, 0xE7 ; 231 1d0: 98 f0 brcs .+38 ; 0x1f8 000001d2 <___addsf3x_110>: 1d2: 46 95 lsr r20 1d4: 37 95 ror r19 1d6: 27 95 ror r18 1d8: a7 95 ror r26 1da: f0 40 sbci r31, 0x00 ; 0 1dc: 53 95 inc r21 1de: c9 f7 brne .-14 ; 0x1d2 000001e0 <___addsf3x_120>: 1e0: 76 f0 brts .+28 ; 0x1fe 1e2: ba 0f add r27, r26 1e4: 62 1f adc r22, r18 1e6: 73 1f adc r23, r19 1e8: 84 1f adc r24, r20 1ea: 30 f4 brcc .+12 ; 0x1f8 1ec: 87 95 ror r24 1ee: 77 95 ror r23 1f0: 67 95 ror r22 1f2: b7 95 ror r27 1f4: f0 40 sbci r31, 0x00 ; 0 1f6: 93 95 inc r25 000001f8 <___addsf3x_130>: 1f8: 17 fa bst r1, 7 1fa: 0f 2e mov r0, r31 1fc: 08 95 ret 000001fe <___addsf3x_200>: 1fe: bf 1b sub r27, r31 200: bb 27 eor r27, r27 202: ba 0b sbc r27, r26 204: 62 0b sbc r22, r18 206: 73 0b sbc r23, r19 208: 84 0b sbc r24, r20 20a: f6 cf rjmp .-20 ; 0x1f8 0000020c <___addsf3x_300>: 20c: de f6 brtc .-74 ; 0x1c4 20e: 61 c0 rjmp .+194 ; 0x2d2 00000210 <__fixsfsi>: 210: 97 fb bst r25, 7 212: 4e d0 rcall .+156 ; 0x2b0 214: 9f 37 cpi r25, 0x7F ; 127 216: 38 f0 brcs .+14 ; 0x226 218: fe e9 ldi r31, 0x9E ; 158 21a: f9 1b sub r31, r25 21c: 98 2f mov r25, r24 21e: 87 2f mov r24, r23 220: 76 2f mov r23, r22 222: 6b 2f mov r22, r27 224: 05 c0 rjmp .+10 ; 0x230 00000226 <___fixsfsi_zero>: 226: 52 c0 rjmp .+164 ; 0x2cc 00000228 <___fixsfsi_05>: 228: 96 95 lsr r25 22a: 87 95 ror r24 22c: 77 95 ror r23 22e: 67 95 ror r22 00000230 <___fixsfsi_10>: 230: f1 50 subi r31, 0x01 ; 1 232: d0 f7 brcc .-12 ; 0x228 234: 3e f4 brtc .+14 ; 0x244 00000236 <__fp_lneg>: 236: 90 95 com r25 238: 80 95 com r24 23a: 70 95 com r23 23c: 61 95 neg r22 23e: 7f 4f sbci r23, 0xFF ; 255 240: 8f 4f sbci r24, 0xFF ; 255 242: 9f 4f sbci r25, 0xFF ; 255 00000244 : 244: 08 95 ret 00000246 <__floatunssisf>: 246: e8 94 clt 248: 03 c0 rjmp .+6 ; 0x250 0000024a <__floatsisf>: 24a: 97 fb bst r25, 7 24c: 0e f4 brtc .+2 ; 0x250 24e: f3 df rcall .-26 ; 0x236 00000250 <___floatsisf_10>: 250: b6 2f mov r27, r22 252: 67 2f mov r22, r23 254: 78 2f mov r23, r24 256: 89 2f mov r24, r25 258: 9e e9 ldi r25, 0x9E ; 158 25a: 00 24 eor r0, r0 25c: 05 c0 rjmp .+10 ; 0x268 0000025e : 25e: 9a 95 dec r25 260: bb 0f add r27, r27 262: 66 1f adc r22, r22 264: 77 1f adc r23, r23 266: 88 1f adc r24, r24 00000268 <__fp_merge>: 268: 11 24 eor r1, r1 26a: 99 23 and r25, r25 26c: a1 f0 breq .+40 ; 0x296 26e: 88 23 and r24, r24 270: b2 f7 brpl .-20 ; 0x25e 272: 9f 3f cpi r25, 0xFF ; 255 274: 59 f0 breq .+22 ; 0x28c 276: bb 0f add r27, r27 278: 48 f4 brcc .+18 ; 0x28c 27a: 21 f4 brne .+8 ; 0x284 27c: 00 20 and r0, r0 27e: 11 f4 brne .+4 ; 0x284 280: 60 ff sbrs r22, 0 282: 04 c0 rjmp .+8 ; 0x28c 00000284 : 284: 6f 5f subi r22, 0xFF ; 255 286: 7f 4f sbci r23, 0xFF ; 255 288: 8f 4f sbci r24, 0xFF ; 255 28a: 9f 4f sbci r25, 0xFF ; 255 0000028c : 28c: 88 1f adc r24, r24 28e: 97 95 ror r25 290: 87 95 ror r24 292: 97 f9 bld r25, 7 294: 08 95 ret 00000296 : 296: 1a c0 rjmp .+52 ; 0x2cc 00000298 <__fp_split3>: 298: 05 2e mov r0, r21 29a: 09 26 eor r0, r25 29c: 07 fa bst r0, 7 0000029e <__fp_split2>: 29e: 44 0f add r20, r20 2a0: 55 1f adc r21, r21 2a2: 5f 3f cpi r21, 0xFF ; 255 2a4: 79 f0 breq .+30 ; 0x2c4 2a6: aa 27 eor r26, r26 2a8: a5 17 cp r26, r21 2aa: 08 f0 brcs .+2 ; 0x2ae 2ac: 51 e0 ldi r21, 0x01 ; 1 2ae: 47 95 ror r20 000002b0 <__fp_split1>: 2b0: 88 0f add r24, r24 2b2: 99 1f adc r25, r25 2b4: 9f 3f cpi r25, 0xFF ; 255 2b6: 31 f0 breq .+12 ; 0x2c4 2b8: bb 27 eor r27, r27 2ba: b9 17 cp r27, r25 2bc: 08 f0 brcs .+2 ; 0x2c0 2be: 91 e0 ldi r25, 0x01 ; 1 2c0: 87 95 ror r24 2c2: 08 95 ret 000002c4 : 2c4: 9f 91 pop r25 2c6: 9f 91 pop r25 2c8: 11 24 eor r1, r1 2ca: 57 c0 rjmp .+174 ; 0x37a 000002cc <__fp_zero>: 2cc: 66 27 eor r22, r22 2ce: 77 27 eor r23, r23 2d0: 88 27 eor r24, r24 000002d2 <__fp_zerox>: 2d2: 99 27 eor r25, r25 2d4: 08 95 ret 000002d6 : 2d6: 59 2f mov r21, r25 2d8: 48 2f mov r20, r24 2da: 37 2f mov r19, r23 2dc: 26 2f mov r18, r22 000002de <__mulsf3>: 2de: dc df rcall .-72 ; 0x298 2e0: 01 d0 rcall .+2 ; 0x2e4 2e2: c2 cf rjmp .-124 ; 0x268 000002e4 <__mulsf3x>: 2e4: 99 23 and r25, r25 2e6: 39 f0 breq .+14 ; 0x2f6 000002e8 <___mulsf3_10>: 2e8: 55 23 and r21, r21 2ea: 29 f0 breq .+10 ; 0x2f6 000002ec <___mulsf3x_00>: 2ec: 9f 57 subi r25, 0x7F ; 127 2ee: 5f 57 subi r21, 0x7F ; 127 2f0: 95 0f add r25, r21 2f2: 13 f4 brvc .+4 ; 0x2f8 2f4: ca f1 brmi .+114 ; 0x368 000002f6 <___mulsf3x_ZERO>: 2f6: ed cf rjmp .-38 ; 0x2d2 000002f8 <___mulsf3x_20>: 2f8: 91 58 subi r25, 0x81 ; 129 2fa: 9f 3f cpi r25, 0xFF ; 255 2fc: e1 f3 breq .-8 ; 0x2f6 2fe: a6 2f mov r26, r22 300: 00 24 eor r0, r0 302: 11 24 eor r1, r1 304: bb 27 eor r27, r27 306: 66 27 eor r22, r22 308: 55 27 eor r21, r21 30a: f8 e0 ldi r31, 0x08 ; 8 0000030c <___mulsf3x_100>: 30c: a6 95 lsr r26 30e: 20 f4 brcc .+8 ; 0x318 310: 02 0e add r0, r18 312: 13 1e adc r1, r19 314: b4 1f adc r27, r20 316: 65 1f adc r22, r21 00000318 <___mulsf3x_101>: 318: 22 0f add r18, r18 31a: 33 1f adc r19, r19 31c: 44 1f adc r20, r20 31e: 55 1f adc r21, r21 320: fa 95 dec r31 322: a1 f7 brne .-24 ; 0x30c 324: f8 e0 ldi r31, 0x08 ; 8 326: e7 2f mov r30, r23 328: 77 27 eor r23, r23 32a: f8 e0 ldi r31, 0x08 ; 8 0000032c <___mulsf3x_200>: 32c: e6 95 lsr r30 32e: 20 f4 brcc .+8 ; 0x338 330: 13 0e add r1, r19 332: b4 1f adc r27, r20 334: 65 1f adc r22, r21 336: 7a 1f adc r23, r26 00000338 <___mulsf3x_201>: 338: 33 0f add r19, r19 33a: 44 1f adc r20, r20 33c: 55 1f adc r21, r21 33e: aa 1f adc r26, r26 340: fa 95 dec r31 342: a1 f7 brne .-24 ; 0x32c 344: f8 2f mov r31, r24 346: 88 27 eor r24, r24 00000348 <___mulsf3x_300>: 348: f6 95 lsr r31 34a: 20 f4 brcc .+8 ; 0x354 34c: b4 0f add r27, r20 34e: 65 1f adc r22, r21 350: 7a 1f adc r23, r26 352: 8e 1f adc r24, r30 00000354 <___mulsf3x_301>: 354: 44 0f add r20, r20 356: 55 1f adc r21, r21 358: aa 1f adc r26, r26 35a: ee 1f adc r30, r30 35c: ff 23 and r31, r31 35e: a1 f7 brne .-24 ; 0x348 00000360 <___mulsf3x_400>: 360: 88 23 and r24, r24 362: 1a f4 brpl .+6 ; 0x36a 364: 93 95 inc r25 366: 39 f4 brne .+14 ; 0x376 00000368 <___mulsf3x_INF>: 368: 08 c0 rjmp .+16 ; 0x37a 0000036a <___mulsf3x_405>: 36a: 00 0c add r0, r0 36c: 11 1c adc r1, r1 36e: bb 1f adc r27, r27 370: 66 1f adc r22, r22 372: 77 1f adc r23, r23 374: 88 1f adc r24, r24 00000376 <___mulsf3x_420>: 376: 01 28 or r0, r1 378: 08 95 ret 0000037a <__fp_nan>: 37a: 9f ef ldi r25, 0xFF ; 255 37c: 80 ec ldi r24, 0xC0 ; 192 37e: 08 95 ret