
main.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         000002f4  00000000  00000000  00000094  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         0000000a  00800060  000002f4  00000388  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  2 .bss          0000000c  0080006a  0080006a  00000392  2**0
                  ALLOC
  3 .noinit       00000000  00800076  00800076  00000392  2**0
                  CONTENTS
  4 .eeprom       00000000  00810000  00810000  00000392  2**0
                  CONTENTS
  5 .stab         00001548  00000000  00000000  00000394  2**2
                  CONTENTS, READONLY, DEBUGGING
  6 .stabstr      00001c3f  00000000  00000000  000018dc  2**0
                  CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

00000000 <__vectors>:
   0:	0c 94 2a 00 	jmp	0x54 <__ctors_end>
   4:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
   8:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
   c:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  10:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  14:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  18:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  1c:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  20:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  24:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  28:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  2c:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  30:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  34:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  38:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  3c:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  40:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  44:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  48:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  4c:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>
  50:	0c 94 45 00 	jmp	0x8a <__bad_interrupt>

00000054 <__ctors_end>:
  54:	11 24       	eor	r1, r1
  56:	1f be       	out	0x3f, r1	; 63
  58:	cf e5       	ldi	r28, 0x5F	; 95
  5a:	d8 e0       	ldi	r29, 0x08	; 8
  5c:	de bf       	out	0x3e, r29	; 62
  5e:	cd bf       	out	0x3d, r28	; 61

00000060 <__do_copy_data>:
  60:	10 e0       	ldi	r17, 0x00	; 0
  62:	a0 e6       	ldi	r26, 0x60	; 96
  64:	b0 e0       	ldi	r27, 0x00	; 0
  66:	e4 ef       	ldi	r30, 0xF4	; 244
  68:	f2 e0       	ldi	r31, 0x02	; 2
  6a:	02 c0       	rjmp	.+4      	; 0x70 <.do_copy_data_start>

0000006c <.do_copy_data_loop>:
  6c:	05 90       	lpm	r0, Z+
  6e:	0d 92       	st	X+, r0

00000070 <.do_copy_data_start>:
  70:	aa 36       	cpi	r26, 0x6A	; 106
  72:	b1 07       	cpc	r27, r17
  74:	d9 f7       	brne	.-10     	; 0x6c <.do_copy_data_loop>

00000076 <__do_clear_bss>:
  76:	10 e0       	ldi	r17, 0x00	; 0
  78:	aa e6       	ldi	r26, 0x6A	; 106
  7a:	b0 e0       	ldi	r27, 0x00	; 0
  7c:	01 c0       	rjmp	.+2      	; 0x80 <.do_clear_bss_start>

0000007e <.do_clear_bss_loop>:
  7e:	1d 92       	st	X+, r1

00000080 <.do_clear_bss_start>:
  80:	a6 37       	cpi	r26, 0x76	; 118
  82:	b1 07       	cpc	r27, r17
  84:	e1 f7       	brne	.-8      	; 0x7e <.do_clear_bss_loop>
  86:	0c 94 21 01 	jmp	0x242 <main>

0000008a <__bad_interrupt>:
  8a:	0c 94 00 00 	jmp	0x0 <__heap_end>

0000008e <adc_init>:
//------------------| initialize ADC |----------------------

void adc_init() {
  // Activate ADC with Prescaler 
  ADCSRA =  1 << ADEN  |
  8e:	84 e8       	ldi	r24, 0x84	; 132
  90:	86 b9       	out	0x06, r24	; 6
  92:	08 95       	ret

00000094 <pwm_init>:
            0 << ADSC  |
            0 << ADATE |
            0 << ADIF  |
            0 << ADIE  |
            1 << ADPS2 |
            0 << ADPS1 |
            0 << ADPS0 ;
}

//------------------| initialize PWM |----------------------

void pwm_init() {
  // clear pwm levels
  OCR0 = 0; 
  94:	1c be       	out	0x3c, r1	; 60
  OCR2 = 0;
  96:	13 bc       	out	0x23, r1	; 35
  
  // set up WGM, clock, and mode for timer 0
  TCCR0 = 0 << FOC0  | 
  98:	8b e7       	ldi	r24, 0x7B	; 123
  9a:	83 bf       	out	0x33, r24	; 51
          1 << WGM00 | /* fast pwm */
          1 << COM01 | /* inverted */
          1 << COM00 | /*   this bit 1 for interted, 0 for normal  */
          1 << WGM01 | /* fast pwm */
          0 << CS02  | /* prescale by 8*/
          1 << CS01  |
          1 << CS00  ;
  
  // set up WGM, clock, and mode for timer 2
  TCCR2 = 0 << FOC2  | 
  9c:	8a e7       	ldi	r24, 0x7A	; 122
  9e:	85 bd       	out	0x25, r24	; 37
  a0:	08 95       	ret

000000a2 <serial_init>:
          1 << WGM20 |
          1 << COM21 |
          1 << COM20 | /*   this bit 1 for interted, 0 for normal  */
          1 << WGM21 |
          0 << CS22  |
          1 << CS21  |
          0 << CS20  ;
  
 }

//------------------| initialize serial |----------------------

void serial_init() {
   /* Set baud rate */
   UBRRH = (unsigned char)(25>>8);
  a2:	10 bc       	out	0x20, r1	; 32
   UBRRL = (unsigned char)25;
  a4:	89 e1       	ldi	r24, 0x19	; 25
  a6:	89 b9       	out	0x09, r24	; 9
   /* set 2X baud rate */
   UCSRA = (1<<U2X);
  a8:	82 e0       	ldi	r24, 0x02	; 2
  aa:	8b b9       	out	0x0b, r24	; 11
   /* Enable receiver and interrupts */
   UCSRB = (1<<RXCIE)|(1<<RXEN);
  ac:	80 e9       	ldi	r24, 0x90	; 144
  ae:	8a b9       	out	0x0a, r24	; 10
   /* Set frame format: No parity, 8data, 1stop bit */
   UCSRC = (1<<URSEL)|(1<<UCSZ1)|(1<<UCSZ0);   //For devices without Extended IO
  b0:	86 e8       	ldi	r24, 0x86	; 134
  b2:	80 bd       	out	0x20, r24	; 32
  b4:	08 95       	ret

000000b6 <Analog>:

}

//------------------| Get analog value |----------------------

int Analog ( uint8_t n ) {

    // Select pin ADC0 using MUX
    ADMUX = n & 7;
  b6:	87 70       	andi	r24, 0x07	; 7
  b8:	87 b9       	out	0x07, r24	; 7
    
    //Start conversion
    ADCSRA |= _BV(ADSC);
  ba:	36 9a       	sbi	0x06, 6	; 6
    
    // wait until converstion completed
    while (ADCSRA & _BV(ADSC) ) {}
  bc:	36 99       	sbic	0x06, 6	; 6
  be:	fe cf       	rjmp	.-4      	; 0xbc <Analog+0x6>
    
    // get converted value
    return ADC;  
  c0:	84 b1       	in	r24, 0x04	; 4
  c2:	95 b1       	in	r25, 0x05	; 5
  c4:	08 95       	ret

000000c6 <SetPWM>:
}

//----------------| Main Pogram Loup |-----------------

void dostuff ( ) {
        
      while (1) {
      
        processByte(USART_Receive());
       
        // Gather values
      //  X = Analog(0) / 2;
      //  Y = Analog(1) / 2;
      
        // Offset correction        
        X = ((CX - 128) * 2);
        Y = ((CY - 128) * 2);
                 
        // Threasholding
        if ( (X > -Threashold) & (X < Threashold) )  X = 0;
        if ( (Y > -Threashold) & (Y < Threashold) )  Y = 0;        
                    
        // Tractor mixing:
        SpeedL = X + Y;
        SpeedR = Y - X;               
                                
        // range correction       erm, did it all come out ok?
        
        if (SpeedL > 255) SpeedL = 255;
        if (SpeedR > 255) SpeedR = 255;        
        
        //output
        SetPWM( SpeedL, SpeedR );
      }

}

//-----------------| Set Pwm rates |------------------


void SetPWM( uint8_t left, uint8_t right ) {
   
     if (left > 0) {
  c6:	88 23       	and	r24, r24
  c8:	39 f0       	breq	.+14     	; 0xd8 <SetPWM+0x12>
       PWMLeft = left;
  ca:	83 bd       	out	0x23, r24	; 35
       LForward();       
  cc:	95 9a       	sbi	0x12, 5	; 18
     } else {
       PWMLeft = -(left);
       LReverse();       
     }
     
     if (right > 0) {
  ce:	66 23       	and	r22, r22
  d0:	39 f0       	breq	.+14     	; 0xe0 <SetPWM+0x1a>
       PWMRight = right;
  d2:	6c bf       	out	0x3c, r22	; 60
       RForward();       
  d4:	96 9a       	sbi	0x12, 6	; 18
  d6:	08 95       	ret
  d8:	13 bc       	out	0x23, r1	; 35
  da:	95 98       	cbi	0x12, 5	; 18
  dc:	66 23       	and	r22, r22
  de:	c9 f7       	brne	.-14     	; 0xd2 <SetPWM+0xc>
     } else {
       PWMRight = -(right);
  e0:	1c be       	out	0x3c, r1	; 60
       RReverse();       
  e2:	96 98       	cbi	0x12, 6	; 18
  e4:	08 95       	ret

000000e6 <processByte>:
     }
    
}

//----------| Serial character recieve |-------------

void processByte(char newChar) {  
//SIGNAL (SIG_UART_DATA) {
 
 // char newChar; 
 // newChar = UDR;

  switch(state) {
  e6:	90 91 6e 00 	lds	r25, 0x006E
  ea:	9a 30       	cpi	r25, 0x0A	; 10
  ec:	89 f0       	breq	.+34     	; 0x110 <processByte+0x2a>
  ee:	9b 30       	cpi	r25, 0x0B	; 11
  f0:	38 f0       	brcs	.+14     	; 0x100 <processByte+0x1a>
  f2:	94 31       	cpi	r25, 0x14	; 20
  f4:	69 f0       	breq	.+26     	; 0x110 <processByte+0x2a>
  f6:	95 31       	cpi	r25, 0x15	; 21
  f8:	41 f1       	breq	.+80     	; 0x14a <processByte+0x64>
  fa:	9b 30       	cpi	r25, 0x0B	; 11
  fc:	99 f1       	breq	.+102    	; 0x164 <processByte+0x7e>
  fe:	08 95       	ret
 100:	99 23       	and	r25, r25
 102:	c9 f4       	brne	.+50     	; 0x136 <processByte+0x50>
  
    case 0:
       switch(newChar) {
 104:	80 35       	cpi	r24, 0x50	; 80
 106:	d9 f7       	brne	.-10     	; 0xfe <processByte+0x18>
         case 'P':
            state = 1;
 108:	81 e0       	ldi	r24, 0x01	; 1
 10a:	80 93 6e 00 	sts	0x006E, r24
 10e:	08 95       	ret
         break;
       //  default:
         //   USART_Transmit( '?' );
       }
    break;
    
    case 1:
      switch(newChar){
        case 'X':
         state = 10;
        break;
        
        case 'Y':
         state = 20;
        break;
        
        default:
      //  USART_Transmit( '?' );
        state = 0;
      } 
    break;
      
    // scrap the error checking...
    case 10:      
    case 20:
      if (newChar > '9') { newChar -= 7; }
 110:	8a 33       	cpi	r24, 0x3A	; 58
 112:	44 f4       	brge	.+16     	; 0x124 <processByte+0x3e>
      value = (newChar&(0x0F)) << 4;      
 114:	82 95       	swap	r24
 116:	80 7f       	andi	r24, 0xF0	; 240
 118:	80 93 75 00 	sts	0x0075, r24
      state++;
 11c:	9f 5f       	subi	r25, 0xFF	; 255
 11e:	90 93 6e 00 	sts	0x006E, r25
 122:	08 95       	ret
 124:	87 50       	subi	r24, 0x07	; 7
 126:	82 95       	swap	r24
 128:	80 7f       	andi	r24, 0xF0	; 240
 12a:	80 93 75 00 	sts	0x0075, r24
 12e:	9f 5f       	subi	r25, 0xFF	; 255
 130:	90 93 6e 00 	sts	0x006E, r25
 134:	08 95       	ret
 136:	91 30       	cpi	r25, 0x01	; 1
 138:	11 f7       	brne	.-60     	; 0xfe <processByte+0x18>
 13a:	88 35       	cpi	r24, 0x58	; 88
 13c:	21 f1       	breq	.+72     	; 0x186 <processByte+0xa0>
 13e:	89 35       	cpi	r24, 0x59	; 89
 140:	d9 f4       	brne	.+54     	; 0x178 <processByte+0x92>
 142:	84 e1       	ldi	r24, 0x14	; 20
 144:	80 93 6e 00 	sts	0x006E, r24
 148:	08 95       	ret
    break;
      
    case 11:
      if (newChar > '9') { newChar -= 7; }
      value |= (newChar&(0x0F)) ;    
      CX = value;
     // USART_printstring("OK.\n\r");
      state = 0;
    break;   
    
    case 21:
      if (newChar > '9') { newChar -= 7; }
 14a:	8a 33       	cpi	r24, 0x3A	; 58
 14c:	c4 f4       	brge	.+48     	; 0x17e <processByte+0x98>
      value |= (newChar&(0x0F)) ;    
 14e:	8f 70       	andi	r24, 0x0F	; 15
 150:	90 91 75 00 	lds	r25, 0x0075
 154:	89 2b       	or	r24, r25
 156:	80 93 75 00 	sts	0x0075, r24
      CY = value;
 15a:	80 93 6f 00 	sts	0x006F, r24
     // USART_printstring("OK.\n\r");
      state = 0;
 15e:	10 92 6e 00 	sts	0x006E, r1
 162:	08 95       	ret
 164:	8a 33       	cpi	r24, 0x3A	; 58
 166:	6c f4       	brge	.+26     	; 0x182 <processByte+0x9c>
 168:	8f 70       	andi	r24, 0x0F	; 15
 16a:	90 91 75 00 	lds	r25, 0x0075
 16e:	89 2b       	or	r24, r25
 170:	80 93 75 00 	sts	0x0075, r24
 174:	80 93 72 00 	sts	0x0072, r24
 178:	10 92 6e 00 	sts	0x006E, r1
 17c:	08 95       	ret
 17e:	87 50       	subi	r24, 0x07	; 7
 180:	e6 cf       	rjmp	.-52     	; 0x14e <processByte+0x68>
 182:	87 50       	subi	r24, 0x07	; 7
 184:	f1 cf       	rjmp	.-30     	; 0x168 <processByte+0x82>
 186:	8a e0       	ldi	r24, 0x0A	; 10
 188:	80 93 6e 00 	sts	0x006E, r24
 18c:	08 95       	ret

0000018e <dostuff>:
 18e:	cf 93       	push	r28
 190:	df 93       	push	r29
 192:	cf ef       	ldi	r28, 0xFF	; 255
 194:	d0 e0       	ldi	r29, 0x00	; 0
 196:	0e 94 49 01 	call	0x292 <USART_Receive>
 19a:	0e 94 73 00 	call	0xe6 <processByte>
 19e:	80 91 72 00 	lds	r24, 0x0072
 1a2:	99 27       	eor	r25, r25
 1a4:	88 0f       	add	r24, r24
 1a6:	99 1f       	adc	r25, r25
 1a8:	80 50       	subi	r24, 0x00	; 0
 1aa:	91 40       	sbci	r25, 0x01	; 1
 1ac:	90 93 74 00 	sts	0x0074, r25
 1b0:	80 93 73 00 	sts	0x0073, r24
 1b4:	20 91 6f 00 	lds	r18, 0x006F
 1b8:	33 27       	eor	r19, r19
 1ba:	22 0f       	add	r18, r18
 1bc:	33 1f       	adc	r19, r19
 1be:	20 50       	subi	r18, 0x00	; 0
 1c0:	31 40       	sbci	r19, 0x01	; 1
 1c2:	30 93 6b 00 	sts	0x006B, r19
 1c6:	20 93 6a 00 	sts	0x006A, r18
 1ca:	43 96       	adiw	r24, 0x13	; 19
 1cc:	87 97       	sbiw	r24, 0x27	; 39
 1ce:	20 f4       	brcc	.+8      	; 0x1d8 <dostuff+0x4a>
 1d0:	10 92 74 00 	sts	0x0074, r1
 1d4:	10 92 73 00 	sts	0x0073, r1
 1d8:	2d 5e       	subi	r18, 0xED	; 237
 1da:	3f 4f       	sbci	r19, 0xFF	; 255
 1dc:	27 32       	cpi	r18, 0x27	; 39
 1de:	31 05       	cpc	r19, r1
 1e0:	20 f4       	brcc	.+8      	; 0x1ea <dostuff+0x5c>
 1e2:	10 92 6b 00 	sts	0x006B, r1
 1e6:	10 92 6a 00 	sts	0x006A, r1
 1ea:	80 91 73 00 	lds	r24, 0x0073
 1ee:	90 91 74 00 	lds	r25, 0x0074
 1f2:	20 91 6a 00 	lds	r18, 0x006A
 1f6:	30 91 6b 00 	lds	r19, 0x006B
 1fa:	ac 01       	movw	r20, r24
 1fc:	42 0f       	add	r20, r18
 1fe:	53 1f       	adc	r21, r19
 200:	50 93 71 00 	sts	0x0071, r21
 204:	40 93 70 00 	sts	0x0070, r20
 208:	28 1b       	sub	r18, r24
 20a:	39 0b       	sbc	r19, r25
 20c:	30 93 6d 00 	sts	0x006D, r19
 210:	20 93 6c 00 	sts	0x006C, r18
 214:	4f 3f       	cpi	r20, 0xFF	; 255
 216:	51 05       	cpc	r21, r1
 218:	29 f0       	breq	.+10     	; 0x224 <dostuff+0x96>
 21a:	24 f0       	brlt	.+8      	; 0x224 <dostuff+0x96>
 21c:	d0 93 71 00 	sts	0x0071, r29
 220:	c0 93 70 00 	sts	0x0070, r28
 224:	2f 3f       	cpi	r18, 0xFF	; 255
 226:	31 05       	cpc	r19, r1
 228:	29 f0       	breq	.+10     	; 0x234 <dostuff+0xa6>
 22a:	24 f0       	brlt	.+8      	; 0x234 <dostuff+0xa6>
 22c:	d0 93 6d 00 	sts	0x006D, r29
 230:	c0 93 6c 00 	sts	0x006C, r28
 234:	60 91 6c 00 	lds	r22, 0x006C
 238:	80 91 70 00 	lds	r24, 0x0070
 23c:	0e 94 63 00 	call	0xc6 <SetPWM>
 240:	aa cf       	rjmp	.-172    	; 0x196 <dostuff+0x8>

00000242 <main>:
 242:	cf e5       	ldi	r28, 0x5F	; 95
 244:	d8 e0       	ldi	r29, 0x08	; 8
 246:	de bf       	out	0x3e, r29	; 62
 248:	cd bf       	out	0x3d, r28	; 61
 24a:	83 e0       	ldi	r24, 0x03	; 3
 24c:	8a bb       	out	0x1a, r24	; 26
 24e:	8b e0       	ldi	r24, 0x0B	; 11
 250:	87 bb       	out	0x17, r24	; 23
 252:	14 ba       	out	0x14, r1	; 20
 254:	10 e8       	ldi	r17, 0x80	; 128
 256:	11 bb       	out	0x11, r17	; 17
 258:	0e 94 47 00 	call	0x8e <adc_init>
 25c:	0e 94 4a 00 	call	0x94 <pwm_init>
 260:	8f ec       	ldi	r24, 0xCF	; 207
 262:	90 e0       	ldi	r25, 0x00	; 0
 264:	0e 94 40 01 	call	0x280 <USART_Init>
 268:	80 e6       	ldi	r24, 0x60	; 96
 26a:	90 e0       	ldi	r25, 0x00	; 0
 26c:	0e 94 6a 01 	call	0x2d4 <USART_printstring>
 270:	10 93 72 00 	sts	0x0072, r17
 274:	10 93 6f 00 	sts	0x006F, r17
 278:	0e 94 c7 00 	call	0x18e <dostuff>
 27c:	0c 94 79 01 	jmp	0x2f2 <_exit>

00000280 <USART_Init>:
 280:	29 2f       	mov	r18, r25
 282:	33 27       	eor	r19, r19
 284:	20 bd       	out	0x20, r18	; 32
 286:	89 b9       	out	0x09, r24	; 9
 288:	88 e1       	ldi	r24, 0x18	; 24
 28a:	8a b9       	out	0x0a, r24	; 10
 28c:	8e e8       	ldi	r24, 0x8E	; 142
 28e:	80 bd       	out	0x20, r24	; 32
 290:	08 95       	ret

00000292 <USART_Receive>:
 292:	5f 9b       	sbis	0x0b, 7	; 11
 294:	fe cf       	rjmp	.-4      	; 0x292 <USART_Receive>
 296:	8c b1       	in	r24, 0x0c	; 12
 298:	99 27       	eor	r25, r25
 29a:	08 95       	ret

0000029c <USART_Transmit>:
 29c:	5d 9b       	sbis	0x0b, 5	; 11
 29e:	fe cf       	rjmp	.-4      	; 0x29c <USART_Transmit>
 2a0:	8c b9       	out	0x0c, r24	; 12
 2a2:	08 95       	ret

000002a4 <USART_printhex>:
 2a4:	1f 93       	push	r17
 2a6:	28 2f       	mov	r18, r24
 2a8:	98 2f       	mov	r25, r24
 2aa:	92 95       	swap	r25
 2ac:	9f 70       	andi	r25, 0x0F	; 15
 2ae:	89 2f       	mov	r24, r25
 2b0:	80 5d       	subi	r24, 0xD0	; 208
 2b2:	8a 33       	cpi	r24, 0x3A	; 58
 2b4:	08 f0       	brcs	.+2      	; 0x2b8 <USART_printhex+0x14>
 2b6:	89 5f       	subi	r24, 0xF9	; 249
 2b8:	92 2f       	mov	r25, r18
 2ba:	9f 70       	andi	r25, 0x0F	; 15
 2bc:	19 2f       	mov	r17, r25
 2be:	10 5d       	subi	r17, 0xD0	; 208
 2c0:	1a 33       	cpi	r17, 0x3A	; 58
 2c2:	08 f0       	brcs	.+2      	; 0x2c6 <USART_printhex+0x22>
 2c4:	19 5f       	subi	r17, 0xF9	; 249
 2c6:	0e 94 4e 01 	call	0x29c <USART_Transmit>
 2ca:	81 2f       	mov	r24, r17
 2cc:	0e 94 4e 01 	call	0x29c <USART_Transmit>
 2d0:	1f 91       	pop	r17
 2d2:	08 95       	ret

000002d4 <USART_printstring>:
 2d4:	cf 93       	push	r28
 2d6:	df 93       	push	r29
 2d8:	ec 01       	movw	r28, r24
 2da:	88 81       	ld	r24, Y
 2dc:	88 23       	and	r24, r24
 2de:	31 f0       	breq	.+12     	; 0x2ec <USART_printstring+0x18>
 2e0:	0e 94 4e 01 	call	0x29c <USART_Transmit>
 2e4:	21 96       	adiw	r28, 0x01	; 1
 2e6:	88 81       	ld	r24, Y
 2e8:	88 23       	and	r24, r24
 2ea:	d1 f7       	brne	.-12     	; 0x2e0 <USART_printstring+0xc>
 2ec:	df 91       	pop	r29
 2ee:	cf 91       	pop	r28
 2f0:	08 95       	ret

000002f2 <_exit>:
 2f2:	ff cf       	rjmp	.-2      	; 0x2f2 <_exit>
